Self-tuning the parallelism degree in Parallel-Nested Transactional Memory

In this document we present an overview of Transactional Memory models, as well as a comparison to traditional parallel frameworks. In this context, we follow with an analysis on the problem of self-tuning concurrency control in transactional memory, where different mechanisms are used to predict and adjust an application’s concurrency level with respect to available parallelism. We are particularly interested in tuning nesting Transactional Memory systems, an aspect that has so far been left unexplored. We review a series of case studies on the various types of concurrency tuning in different transactional frameworks, and propose a new mechanism to tackle self-tuning in nesting Transactional Memory based on techniques used in the literature.